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FLASH MEMORY IC CHIP MT9044AL - MITEL NETWORKS CORPORATION - T1/E1/OC3 SYSTEM SYNCHRONIZER
Quick Detail:
T1/E1/OC3 System Synchronizer
Description:
The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links.
The MT9044 generates ST-BUS clock and framing signals that are phase locked to either a 2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9044 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced, and Stratum 4; and ETSI ETS 300 011. It will meet the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency and MTIE requirements for these specifications.
Applications:
• Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4
Enhanced and Stratum 4 timing for DS1interfaces
• Supports ITU-T G.812 Type IV clocks for 1,544 kbit/s interfaces and 2,048 kbit/s interfaces
• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces
• Selectable 1.544MHz, 2.048MHz or 8kHz input reference signals
• Provides C1.5, C2, C3, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals
• Provides 5 different styles of 8 KHz framing pulses
• Holdover frequency accuracy of 0.05 PPM
• Holdover indication
• Attenuates wander from 1.9Hz
• Provides Time Interval Error (TIE) correction
• Accepts reference inputs from two independent sources
• JTAG Boundary Scan
Specifications:
| part no. | MT9044AL |
| Manufacturer | Mitel Networks Corporation |
| supply ability | 10000 |
| datecode | 10+ |
| package | QFP |
| remark | new and original stock |